Trends in Medium Current Implants for Advanced Devices

By Dr. Leonard Rubin, Senior Scientist

Continued scaling of advanced devices is placing new requirements on medium current ion implanters.  Since medium current is the oldest and most established of the ion implanter equipment types, many past advances in medium current implant technology have largely centered on improving wafer throughput and reducing cost-of-ownership.   Recently, transistors have been scaled to the point where some medium current energy requirements are sufficiently low that they stress the capabilities of older medium current beamlines to deliver adequate beam currents for high volume manufacturing.  This article discusses the reasons for decreasing energy requirements for medium current implanters.

The first driver for reduced medium current energies is the evolution of the n-channel halo (pocket) implant (Fig. 1).  An n-channel device requires a p-type halo structure to mitigate short channel effects.  Traditionally this has been formed using BF2 implants, which are easier to implement than monomer boron implants at low energies.  An added benefit of BF2 halo implants is that the co-implanted fluorine is well known to inhibit B diffusion during the activation anneal.  Diffusion of a halo implant is problematic because halo dopant that diffuses into the extension region will counter-dope that region; while dopant that diffuses into the channel region will decrease carrier mobility (and therefore transistor drive current).

Advanced n-channel devices are now encountering problems with the BF2 halo approach.  First, the dose and energy of the co-implanted F is entirely determined by the dose and energy required for the boron dopant.  Independent optimization of the co-implant concentration and position is not possible with this approach.  Whereas this limitation was inconsequential in the past, device scaling is now close enough to fundamental limits that all available process adjustments must be utilized to optimize device performance.  The second issue with BF2 halo implants is that the doses used are typically close to the amorphization threshold.  Consequently, small changes in process conditions (such as beam current, beam density, or wafer temperature) can cause large changes in the local microstructure (and therefore doping profile) of the halo region.

Changing the halo dopant from BF2 to B eliminates both of these problems, as B is a pure element and typical halo doses are well below its self-amorphization threshold.  Because of its lighter mass, B requires an implant energy approximately 4.5X lower than BF2 to achieve the same dopant depth.  Since halo energies are trending lower anyway due to vertical and horizontal device scaling, it is expected that boron halos will require energies in the 1.5 to 5.0 keV range.

The second major driver for low energy medium current implants is the LDD or extension region for both n-channel and p-channel devices (Fig. 1).  While these implants have long been performed on high current implanters at energies ≤5 keV, they are now practical on medium current implanters.  As the energies of these implants decrease due to device scaling, the doses decrease as well.  The doses are reduced to mitigate the diffusion and leakage-inducing defects that result from implanted dopant concentrations exceeding that to which the dopant is soluble in silicon.  Consequently, it is now practical to complete these implanters on a medium current implanter engineered to have high beam currents at ≤5 keV.  This is relevant for devices on bulk silicon, but is especially true for fully-depleted SOI device (Fig. 2).  Continued scaling has also resulted in some channel and threshold voltage (VT) control implants requiring energies below 5 keV (Fig. 1).

Finally, CMOS image sensors have a unique requirement for low energy, moderate dose implants.  Modern photodiodes require a pinning implant to minimize image lag and dark current and maximize quantum efficiency for blue light.  The pinning region needs to be moderately doped and carefully placed with respect to the edge of the transfer gate to minimize image lag.  It also needs to be as shallow as possible for maximum quantum efficiency (low light sensitivity).  Combined, these requirements drive the need for a medium current implanter with excellent angle control and superior dose uniformity at energies as low as 1.0 keV.

Generic transistor cross section

Figure 1:  Generic transistor cross section, indicating regions that may require low energy medium current implants in the near future.

Depleted SOI transistor

Figure 2:  Cross section of a fully-depleted SOI transistor, indicating regions that may require low energy medium current implants in the near future.